Silicon is used in the semiconductor art to manufacture integrated circuits (ICs), especially for very large scale (VLSI) devices and the like. Many steps in the fabrication of such devices include a wet etch operation using aggressive etching fluids such as hydrofluoric acid (HF).
However, corrosion of silicon may occur when it is dipped in HF. In general, this effect is small, but it can be enhanced when the silicon is highly doped with elements such as Al, As, C, Ga, P, Sb and the like, as is normally the case with silicon used for the manufacture of VLSI modules. Corrosion of silicon may also be enhanced in the presence of ultraviolet (UV) light or with the anodic polarization of silicon structures by an external potential.
Examples of silicon etching in HF solutions are the corrosion of highly doped silicon structures in the presence of UV light as used to detect the junction depth of a pn diode, silicon electropolishing and porous silicon fabrication.
Such corrosion may also be enhanced without the use of an external voltage or illumination. If, in a device, some silicon part is electrically connected with noble metals, e.g., gold wires, a galvanic cell is formed when the device is dipped in HF solution with a potential large enough to significantly etch the silicon parts. In this configuration, the noble metal plays the role of the cathode and the silicon functions as the anode. Reduction of protons to hydrogen molecules takes place at the cathode and silicon etching will result. This etching of silicon increases with the acidity of the solution because more protons are available in more acidic solutions.
The formation of a galvanic cell in a HF solution is illustrated in FIG. 1 using silicon and gold as the anode and cathode, respectively. The figure shows the variation of current (log i) with voltage (V). The corrosion potential between silicon n+ and gold is shown as the point of intersection of the two curves representing the Si n+ current (anode side) and the gold current (cathode side). The redox potential of silicon surface depends on its react chemical composition. Different dopant types and concentrations (n, n+, p, p+) oxidize with different rates and therefore give different currents.
In many silicon ElectroMechanical MicroSystems (MEMS) devices, such as chemical sensors, micromechanical devices and integrated optical elements, a combination of noble metal wiring and silicon is commonly used. Noble metals are used in MEMS fabrication to produce free standing structures using an relatively aggressive etching solutions such as Potassium Hydroxide. Standard metals like Aluminum (Al) would be etched away by such solutions. It is to be noted that wiring must be done before the structure production because processing is much more difficult thereafter.
Silicon oxide films are extensively used in such devices as electrical isolation layers, passivation, or as a masking film. To pattern these films or to remove them at the end of a process, HF based solutions are efficient and widely used wet etching solutions.
When the noble metal and the silicon parts are electrically connected in the presence of HF, the silicon may be corroded galvanically. To avoid such an undesired effect, the straight forward solution would be to protect either the noble metal or the silicon or both during the HF etch. However, in many MEMS devices, such protection is not always possible. Examples of such MEMS devices include devices having free standing structures which limit the deposition and the patterning of protective films.
Another known technique is to inhibit any silicon etching with a cathodic polarization of the silicon by applying a voltage between the silicon structure and the metal part. However, in order to apply such a technique, all the metal and silicon structures must be connected together to two contact zones in order to apply a potential. This may be a problem for devices with many isolated structures, because this would require very complicated and space consuming additional wiring. As is clear to the skilled worker, this would also incur an additional etch step in an already complex process to remove the extra wiring after the device is completed.
It would be desirable to provide a method for protecting silicon micro mechanical structures against undesired galvanic etching that overcomes the above mentioned drawbacks of the state of the art. It would also be desirable for such a method that can be easily incorporated into existing processes.